Memory Compiler in OpenROAD
Building a DFFRAM-based Memory Compiler and integrating it to the OpenROAD-flow-scripts
Greetings! I’m Yash Kumar working on the OpenROAD Memory Compiler Project for which my proposal under the mentorship of Matt and Austin aims to enhance the OpenROAD flow by integrating a DFFRAM generator that extensively uses the OpenDB database to build and layout various memory components like bits, bytes, and 32x32 configurations and more. Taking inspiration from the work of the AUCOHL repository’s DFFRAM memory compiler,
The goal is to develop a DFF/Latch-based RAM that utilizes standard cell libraries. The compiler will generate different views (HDL netlist, functional models, LEF, DEF, Timing, etc.) for specified size configurations, targeting compact design and optimal routing. The compiler should work across various PDKs satrting with Sky130. My initial works tries to test the Bit and Byte level design.
Yash Kumar
Undergraduate in Electronics and Communications Engineering
Yash is an undergraduate at Indian Institute of Information Technology Dharwad pursuing Electronics and Communications Engineering. He is a passionate Hardware Engineering Student who plans to purue his Master’s in the field of VLSI. Working on the concepts of Electonics, Digital Design, RTL, ASIC and FPGA Programming. He has also started working as a Silicon Validation Engineering Intern at Google. Apart from his enthusiasm in the Tech world, Yash likes to play his guitar with his bandmates and swims on his days off.